This example shows how a timed finite state machine can be systematically modeled in TESL (however, a language for defining such a mapping from TFSM to TESL in a generic way is still future work). We model a two-state protocol finite state machine waiting for a request and then waiting for an acknowledgement for 10 units of time. If the acknowledgement does not occur before the delay, a reset event is produced.

The following results shows that event_request is not produced when the acknowledgement comes in time, and is produced when it comes after the 10 time units delay: